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Processors are connected to many external devices like mouse, keyboard, Wi-Fi and network devices. An event is generated when mouse is pressed or keyboard is pressed. To process this event we have to stop or “Interrupt” the microprocessor and handle our mouse press or keyboard press event. We have to write small program called Interrupt Service Routine (ISR) to handle our event, one each for mouse and keyboard. If there are two or more devices then each device needs its own ISR. Now we have problem here, how microprocessor knows which device raised Interrupt. For this microprocessor has one PIN for each device. These PINs are called Interrupt PINs.

Actually 8051 has five interrupt pins as follows:

  1. Timer 0 overflow interrupt- TF0
  2. Timer 1 overflow interrupt- TF1
  3. External hardware interrupt- INT0
  4. External hardware interrupt- INT1
  5. Serial communication interrupt- RI/TI

Interrupt is an asynchronous event generated by external device. When an external device needs microprocessor attention the device raises an interrupt. The microprocessor suspends main program, fetches the interrupt services routine (ISR) and executes it. After completion of ISR the microprocessor returns to main program or resumes suspended main program from where it left.

Microprocessor is programmed in such a way that when an interrupt PIN is raised to High by external device, the microprocessor goes to particular location in memory and start executing from that location. In that location we have to store our ISR.  So, for five interrupt PINs there are five locations in the memory for 8051. These five memory locations are called Interrupt Vectors. Since these five memory locations or Interrupt vectors are only 8 bytes long and obviously not sufficient to store our whole ISR program.  So in Interrupt Vectors we only store memory address where our ISR is located. So when microprocessor receives interrupt from particular PIN, the microprocessor goes to corresponding Interrupt Vector and picks the address of ISR and fetches ISR from that location starts executing it.

There are many types of interrupts like Hardware Interrupts, Software Interrupts, Maskable & non-maskable Interrupts and Fixed & Vector Interrupts

Interrupts can be controlled in many ways in 8051 processor. Interrupts can be enabled or disabled using Interrupt Enable Register (IE Register). Also the priority of interrupts can be changed using Interrupt Priority Register (IP).

Interrupt Vector Table

Interrupt Vector Table

Interrupt Enable Register(IE)

Interrupt Enable Register

EA –  Bit.7 – To enable or disable interrupts.

                if  EA  =  0, all interrupts will be disabled.

                if EA = 1, based on individual bits corresponding interrupt will be enabled or        disabled.

 –        Bit.6 – Not implemented

 –        Bit.5 – Not implemented

ES  –   Bit.4 – Enable/Disable Serial port interrupt

ET1 – Bit.3 – Enable/Disable Timer 1 Interrupt

EX1 – Bit.2 – Enable/Disable External Interrupt 1

ET0 – Bit.1 – Enable/Disable Timer Interrupt 0 EX0 – Bit.0 – Enable/Disable External Interrupt 0

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