The I2C bus is a very popular and powerful bus used for communication between a master (or multiple masters) and a single or multiple slave device. Figure 1 illustrates how many different peripherals may share a bus which is connected to a processor through only 2 wires, which is one of the largest benefits that the I2C bus can give when compared to other interfaces. This application note is aimed at helping users understand how the I2C bus works. Figure 1 shows a typical I2C bus for an embedded system, where multiple slave devices are used. The microcontroller represents the I2C master, and controls the IO expanders, various sensors, EEPROM, ADCs/DACs, and much more. All of which are controlled with only 2 pins from the master

I2C bus architecture

I2C bus architecture

The I2C bus is a standard bidirectional interface that uses a controller, known as the master, to communicate with slave devices. A slave may not transmit data unless it has been addressed by the master. Each device on the I2C bus has a specific device address to differentiate between other devices that are on the same I2C bus. Many slave devices are configured on startup. Master can read the slave’s internal registers, which have unique register addresses. A device can have one or multiple registers where data is stored. Also, these register data can be written or read by master.

The I2C bus uses main two communication line called SDA and SCL.

  • Data Line called SDA which is short for Serial Data
  • Clock Line called SCL which is short for Serial Clock

Both SDA and SCL lines must be connected to VCC through a pull-up resistor Data transfer may be initiated only when the bus is idle. A bus is considered idle if both SDA and SCL lines are high after a STOP condition.

The general procedure for a master to access a slave device is the following:

For sending data from master to a slave:

  • Master-transmitter sends a START condition and addresses the slave-receiver
  • Master-transmitter sends data to slave-receiver
  • Master-transmitter terminates the transfer with a STOP condition

For receiving data from a slave to master:

  • Master-receiver sends a START condition and addresses the slave-transmitter
  • Master-receiver sends the requested register to read to slave-transmitter
  • Master-receiver receives data from the slave-transmitter
  • Master-receiver terminates the transfer with a STOP condition

In a general way the master will initiate a read or write instruction on I2C bus. The device will acknowledge the master if it is ready. The master will send sequence of instruction on I2C bus.

Writing to a Slave On The I2C Bus:

To write on the I2C bus, the master will send a start condition on the bus with the slave’s address, as well as the last bit (the R/W bit) set to 0, which signifies a write. After the slave sends the acknowledge bit, the master will then send the register address of the register it wishes to write to. The slave will acknowledge again, letting the master know it is ready. After this, the master will start sending the register data to the slave, until the master has sent all the data it needs to (sometimes this is only a single byte), and the master will terminate the transmission with a STOP condition. Figure 2 shows an example of writing a single byte to a slave register.

write to one register in a device

write to one register in a device

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